Enhancement MOSFET

ViHa

  • MOSFET:

  • MOSFETs are chosen for VLSI applications instead of BJT’s because MOSFETs can handle high frequency operations but BJT can’t so MOSFETs are preferred over BJTs in VLSI circuits.

  • MOSFET stands for Metal Oxide Semiconductor Field Effect Transistor.

  1. Enhancement N MOSFET :

  1. Zero bias :

At VG= 0 volts there will be no current flowing in the MOSFET as there is no external supply to the device. 

There exists a reverse bias PN Junction with source – P substrate and drain – P substrate. The reverse bias junction has high resistance causing IG = 0A.

  1. VGS >0 Volts

When an external supply is given in a way that the positive terminal of supply is applied to Gate and negative terminal is grounded due to the polarization effect positive charges accumulate at the metal and oxide layer see the orientation of charges towards the external supply there by electrons are oriented towards metal and holes are oriented towards the P substrate. These holes repel with holes of P substrate causing depletion region. As the source and drain are N type electrons are attracted towards the gate by the holes creating accumulation of electrons forming N type channel this is called weak inversion. Once the concentration of electrons in the channel is equal to the concentration of holes in P substrate then it is called as strong inversion.

This state at which channel is formed due to strong inversion makes the current flow in the channel. Due to the flow of current the device gets ON.

The voltage at which strong inversion occurs is called Threshold voltage VT.


Fig: N-MOSFET in linear mode of operation






POLARIZATION EFFECT: The slight orientation of charges towards the external supply.

WEAK INVERSION: The accumulation of charge in the channel.

STRONG INVERSION: When the concentration of charge carriers in the channel is equal to the charge concentration in the substrate it is called as strong inversion.

  1. VGS    VT ; VDS > 0 (small)

At this condition when VGS  VT the channel starts forming and when drain is given with small external supply the electric field attracts electrons from source to drain causing drain current ID to flow across the channel. 

Due to increase in VGS the electrons from source increases thus increasing the concentration of electrons on the surface of P substrate due to which depth of channel increases which is termed as enhancement of channel so the name of the device “Enhancement N MOSFET”.

  1. VGS  = constant , VDS > 0

At this condition when VGS  VT the channel starts forming and when drain is given with small external supply the electric field attracts electrons from source to drain causing drain current ID to flow across the channel increases linearly.

The increment of current is linear because the channel dimension is not varying as VGS is made constant and the concentration of electrons is fixed due to the constant VGS which makes the channel act as a resistor. As per Ohm’s law statement resistor(R) is linear so thus the current increment is linear.

We have negligible voltage drop along the channel as the voltage range from source and drain is small. Due to negligible voltage drop the channel depth is uniform.

  1. VGS >VT , VDS>>0

With increase in VDS the current increase. The VGS is acting perpendicular on the MOS so its effect is the same all over the channel. The electric field induced due to VDS is varying from source to drain as VDS is increasing and thus the drop from source to drain also increases. This leads to reduction of depth of channel towards drain than at source.

  1. VDS>>0

With further increase in VDS the drop from source to drain increases and the gate channel potential reduces from source to drain and thus the depth decreases at drain. At some point of VDS the depth of channel at drain becomes zero, that point is called pinch - off and the voltage is pinch - off voltage.

Pinch – off voltage VDS = VGS  - vT

This pinch – off affects the rate of increment of ID is small as the VDS  is high and resistance of the channel is increasing as channel area decreases.

  1. VDS  VGS – VT , VGS >VT

At this voltage condition due to reverse bias at drain the depletion width of drain increases there by the pinch – off voltage slightly shifts towards the source due to increase in depletion width. At the condition the ID exists. 

As the depletion region forms the electrons from source is being pulled by electric field from drain but at pinch – off region the electric field sweeps the electrons towards drain from source as electrons do not find a path after pinch – off point the velocity starts saturating and thus the mobility of electrons saturates this leads to constant resistance so the ID becomes saturating.

Fig: N-MOSFET in Saturation - pinch- off point







ID equations:

  1. Cut off :

VGS < vT ID =0

  1. Triode region:

VGS – VT > VDS ;  ID = µncox W/L[(VGS-VT)VDS  - VDS2/2]

  1. Saturation region:

VGS-VT < VDS ; ID = 1/2µncoxW/L[VGS-VT]2

Drain characteristics:



Fig: Drain characteristics of NMOSFET








Transfer characteristics:




Fig3: Transfer characteristics of NMOSFET




  1. Enhancement P MOSFET:

  1. Zero bias :

At VG= 0 volts there will be no current flowing in the MOSFET as there is no external supply to the device. 

There exists a reverse bias PN Junction with source – N substrate and drain – N substrate. The reverse bias junction has high resistance causing IG = 0A.

  1. VGS  >  0 Volts

When an external supply is given in a way that the negative terminal of supply is applied to Gate and positive terminal is grounded due to the polarization effect negative charges accumulate at the metal and oxide layer see the orientation of charges towards the external supply thereby holes are oriented towards metal and electrons are oriented towards the N substrate. These electrons repel with electrons of N substrate causing depletion region. As the source and drain are P type holes are attracted towards the gate by the electrons creating accumulation of holes forming P type channels this is called weak inversion. Once the concentration of holes in the channel is equal to the concentration of electrons in the N substrate then it is called as strong inversion.

This state at which channel is formed due to strong inversion makes the current flow in the channel. Due to the flow of current the device gets ON.

The voltage at which strong inversion occurs is called Threshold voltage VT.

  1. VGS   VT ; VDS < 0 (small)

At this condition when VGS    VT the channel starts forming and when drain is given with small external supply the electric field attracts electrons from drain to source causing drain current ID to flow across the channel. 

Due to increase in VGS negatively the electrons from drain increases thus increasing the concentration of holes on the surface of N substrate due to which depth of channel increases which is termed as enhancement of channel so the name of the device “Enhancement P MOSFET”.

  1. VGS  = constant , VDS < 0

At this condition when VGS  VT the channel starts forming and when drain is given with small external supply the electric field attracts electrons from drain to source causing drain current ID to flow across the channel increases linearly.

The increment of current is linear because the channel dimension is not varying as VGS is made constant and the concentration of electrons is fixed due to the constant VGS  which makes the channel  act as a resistor. As per Ohm’s law statement resistor(R) is linear so thus the current increment is linear.

We have negligible voltage drop along the channel as the voltage range from drain and source is small. Due to negligible voltage drop the channel depth is uniform.


Fig: P-MOSFET in linear mode of operation

  1. VGS < VT , VDS << 0

With increase in VDS negatively the current increase. The VGS is acting perpendicular on the MOS so its effect is the same all over the channel. The electric field induced due to VDS is varying from drain to source as VDS is increasing negatively and thus the drop from drain to source also increases. This leads to reduction of depth of channel towards source than at drain.

  1. VDS << 0

With further increase in VDS  negatively the drop from drain to source increases and the gate channel potential reduces from drain to source and thus the depth decreases at source. At some point of VDS the depth of channel at source becomes zero, that point is called pinch - off and the voltage is pinch - off voltage.

Pinch – off voltage VDS = - (VGS  - vT)

This pinch – off affects the rate of increment of ID is small as the VDS is high and resistance of the channel is increasing as channel area decreases.

VDS  ≤ VGS – VT , VGS  < VT

At this voltage condition due to reverse bias at drain the depletion width of source increases there by the pinch – off voltage slightly shifts towards the drain due to increase in depletion width. At the condition the ID exists. 

As the depletion region forms the electrons from drain is being pulled by electric field from source but at pinch – off region the electric field sweeps the electrons towards source from drain as electrons do not find a path after pinch – off point the velocity starts saturating and thus the mobility of electrons saturates this leads to constant resistance so the ID becomes saturating. 

Fig: N-MOSFET in saturation - pinch - off point

ID equations:

  1. Cut off :

VGS >  vT ID =0

  1. Triode region:

VSG -VT < VSD ;  ID = µncox W/L[(VSG+VT)VSD  - VSD2/2]

  1. Saturation region:

VSG-VT  > VSD ; ID = 1/2µncoxW/L[VSG+VT]2

Drain characteristics:




 

Fig: Drain characteristics of PMOSFET




Transfer characteristics:





Fig: Transfer characteristics of PMOSFET


Comments

Post a Comment

Popular posts from this blog

PERL scripting

ViHa
Image
  PERL SCRIPTING Perl is a programming language developed by Larry Wall, especially designed for text processing. It stands for Practical Extraction and Report Language. It runs on a variety of platforms, such as Windows, Mac OS, and the various versions of UNIX. This tutorial provides a complete understanding on Perl. Why to Learn Perl? Perl is a stable, cross platform programming language. Though Perl is not officially an acronym but few people used it as Practical Extraction and Report Language. It is used for mission critical projects in the public and private sectors. Perl is an Open Source software, licensed under its Artistic License , or the GNU General Public License (GPL) . Perl was created by Larry Wall. Perl 1.0 was released to usenet's alt.comp.sources in 1987. At the time of writing this tutorial, the latest version of perl was 5.16.2. Perl is listed in the Oxford English Dictionary . Perl Features Perl takes the best features from other languages, such as C, awk, se...
Read more

SHORT CHANNEL DEVICE

ViHa
Image
Short channel device: A device is said to be short channel if it has following properties: A device is called a short channel if its channel length is <1µm. If the channel length is in the order of depletion region width at source and drain junction it is a short channel device. If the channel length is in the order of junction depth. Reasons for Short channel effect: High electric field: As the channel length is less, the electric field between source and drain is high. V t variations: The source and drain is already depleted and has to be considered as their junction depth is the same channel length. So V GS for channel formation gets reduced as the depletion region of source and drain helps is pre - existence of channel before applying V GS . Short channel effects: Channel length modulation: When V DS > V GS – V t the pinch off moves towards source from drain due to this the depletion width of drain keeps increasing in a manner that the whole channel is occupied by the de...
Read more

Introduction to CMOS inverter

ViHa
Image
CMOS: CMOS stands for Complementary Metal Oxide Semiconductor Field Effect Transistor. Fig: CMOS circuit Advantages of CMOS: High noise margin due to full voltage swing. High input impedance due to I G = 0. Low output impedance, in steady state there always exists a path with finite resistance between output and either V DD or GND, making it less sensitive to noise and disturbances. Ratio less property as the logic of the CMOS does not depend on the W/L ratio of P and N MOSFET. Zero static power dissipation as no direct exists between ground and supply rail under steady state condition. The analysis of the gate is done with respect to the different design metrics as listed below: Cost, expressed by the complexity and area.  Integrity and robustness, expressed by the static (or steady-state) behaviour.   Performance, determined by the dynamic (or transient) response  Energy efficiency, set by the energy and power consumption. Logic: Positive logic = 1:  positiv...
Read more